How CPUs Actually Work: Pipelines, Caches, and Performance

Two processors at the same clock speed can differ several-fold in real work done, and the reason is never the clock. This path builds the model that explains it: how a pipeline overlaps instructions and what a mispredicted branch costs, how a core issues several instructions per cycle and reorders them, why a DRAM access is roughly sixty times an L1 hit, and how the roofline model tells you whether optimising arithmetic is worth any effort at all. You will finish able to predict which loop is faster and say why.