One CPU, two privilege levels
x86 defines four protection rings; in practice operating systems use exactly two. Ring 3 is user mode, ring 0 is kernel mode, and the current ring is a field in the code segment register that only the CPU can change.
The ring is not advisory. It gates concrete capabilities in hardware:
- Privileged instructions. Writing
CR3, loading the interrupt descriptor table, executingHLTorWRMSRfrom ring 3 raises a general protection fault. - Memory. Every page table entry carries a user/supervisor bit. Kernel pages are simply not reachable from ring 3, enforced on every access by the same translation hardware that does paging.
- I/O. Port access and device memory are similarly gated.
So "the kernel" is not a separate program running somewhere. It is code that executes on the same core, in the same instruction stream, at a different privilege level.

