supply-chain

The geographic and corporate concentration of the chip supply chain expressed as engineering risk — single points of failure, the cost of redundancy, hedging strategies, and the customer-side concentration that mirrors the supply side. Structural analysis, not prediction.

Beyond lithography, a fab depends on etch, deposition, implantation, metrology, photoresist, wafers, and specialty gases. Each of these markets concentrated independently, and most show the same compounding-R&D pattern as lithography at smaller scale.

Why chip resolution is bounded by light wavelength, how the industry moved from 193 nm DUV to 13.5 nm EUV, and what makes lithography one of the most concentrated single-vendor markets in modern manufacturing.

The three business models in chip manufacturing — fabless designer, pure-play foundry, integrated device manufacturer — and the capex, yield, and learning-curve forces that drove the leading edge into a small handful of firms.

How a near-perfect silicon ingot becomes a billion-transistor chip. The 600-step fab cycle, photolithography down to 13.5 nm EUV (vaporized tin droplets at 220,000 °C), ion implantation for doping, the truth behind '5 nm' node naming, and the chokepoint-heavy global supply chain.